The present invention relates to a switching system for generating a sinusoidal signal, and more particularly, to a space-vector pulse width modulation switching technique for generating polyphase AC signals that reduces stress in any given leg during low frequency operation.
FIG. 1 shows the structure of a three-phase voltage-source inverter (VSI). While the input to the inverter is a DC voltage Vdc, the output consists of the three phases Va, Vb and Vc. The inverter has six power switches (T1-T6), which will be called power switches. The power switches may include anti-parallel diodes, as is understood in the art. By means of these switches each phase can be connected either to the upper or lower DC voltage rail. The power switches are controlled by three binary gate signals (a, b, c) and their complements (axe2x80x2, bxe2x80x2, cxe2x80x2). A intentional delay between the conduction of the switches in a leg may be utilized to prevent a short. A pair of power switches associated with a phase is called a xe2x80x9clegxe2x80x9d. The switches in the leg are selectively coupled to the input DC source in an alternating fashion to generate the AC signal. There are three legs (leg a, leg b, leg c) depicted in FIG. 1, corresponding to a three phase AC signal. FIG. 1A depicts a generic controller that generates the six PWM control signals (a, b, c) and (axe2x80x2, bxe2x80x2, cxe2x80x2). The controller may utilize voltage and/or current feedback information to adjust the duty cycle of the PWM signals generated, thereby adjusting power delivered to the load.
Using space-vector representation, it is possible to visualize the three output voltages in a two-dimensional plane, as shown in FIG. 2. The (non-normalized) values of Va, Vb, and Vc are obtained by projecting the space-vector Vs onto the three axes A, B, and C. Creating a three-phased sinusoidal voltage at the output of the VSI is equivalent to a space-vector of fixed length rotating at a certain speed.
Each gate signal pair of the VSI can be put into two states, either high or low, corresponding to either the upper transistor on or the lower transistor on. As there are three transistor pairs, eight possible combinations of on and off states exist which can be represented as space-vectors as shown in FIG. 3. The values in parentheses indicates the gate signals to create the vector; (110) for example stands for a=1, b=1, c=0, while axe2x80x2, bxe2x80x2 and cxe2x80x2 are the complementary values. Two zero vectors exist (111) and (000), the other six space-vectors form a hexagon. The triangle areas between two fundamental vectors are called sectors.
Using pulse with modulation, an arbitrary space-vector can be composed by time averaging some of the eight fundamental space-vectors of the VSI. This is illustrated in FIG. 4. Space-vector Vs is created as a weighted sum of vector components V1 and V2, by producing principal vectors in sequence for certain times: creating vector component V1, then vector component state V2, then being in zero vector state. The succession of the different vectors results in what is called space-vector pulse width modulation (SVPWM). Each space vector is produced by the controller by a sequence of space vector components formed from the principal space vector axes. The rotation of the space vector itself, which represents the rotation of the desired phases of the controller output, is different from the rotation of the sequence of space vector components during a PWM period that together make up a single given space vector value.
Numerous switching patterns, or sequences of space vector components, can be used to create a certain space-vector. In most cases, two adjacent vectors plus either one or two zero vectors are chosen, in order to minimize the number of transistors switched. FIG. 5 shows two possible PWM patterns to create Vs in FIG. 4. The drawing shows the state of each transistor pair (leg) versus time during one PWM period. It can be observed that both patterns remain in state (100) and (110) during an identical amount of time. In the left pattern, however, the zero vector is split in two halves and composed by (000) and (111). The right pattern, on the other hand, creates the zero vector entirely from (111). As a consequence, the right pattern switches only four times, while the left pattern has to switch 6 times per PWM period. For pattern B, in each sector one leg does not switch at all. The obvious result of this is reduced switching losses.
Unfortunately, pattern B has one major drawback. When a leg is switched from high to low, the current will change path from flowing through the upper power switch to the lower power switch. This is depicted in FIG. 6. At very low sine-wave frequencies, however, the voltage space-vector can reside in the same sector for an extended amount of time. Low frequencies, as set forth herein, means frequencies below the thermal time constant of a switch that makes up the leg. A high time constant corresponds to a low frequency. Consequently, in pattern B, one leg will not switch at all, and one power switch of this leg will have to carry the phase for an extended amount of time. This results in a high thermal stress of the unit.
Space-vector pulse width modulation (SVPWM) has become a popular PWM technique for three-phase voltage-source inverters (VSI) in applications such as alternating-current (AC) motors, residential and commercial power plants, as well as uninterruptible power supplies. SVPWM is a switching technique used to create a three-phased sinusoidal voltage output of variable frequency and amplitude using a six-transistor power-bridge. In contrast to sinusoidal modulation used in traditional inverters, SVPWM allows for higher output voltages for a given input voltage and also reduces the current harmonics. While different SVPWM switching patterns exist, one of them is of particular interest, as it reduces the switching losses by approximately 33%. Unfortunately, this pattern does not distribute the conduction losses evenly over one PWM period. At very low sine-wave frequencies, one transistor will end up conducting significantly longer than the other five. Consequently, this switch will experience the highest thermal stress and the maximum phase current will have to be reduced in order to prevent the transistor from overheating. The consequence is reduced current capability of the inverter at low sine-wave frequencies, and a deterioration of the performance of the inverter system.
Conventional VSIs operate with one fixed switching pattern. The present invention is a modification of the switching pattern at low sine-wave frequencies creating a more even distribution of the conduction losses. The switching pattern periodically changes the sequence of the space-vector components from clock-wise to counter-clock-wise and vice-versa. This scheme reduces the worst-case conduction losses by up to 50%, while the switching losses will only increase minimally (on the order of 1%). In an AC motor control application, the increase in stall torque can approach 100%.
In one aspect, the present invention provides a voltage source inverter system, comprising a DC voltage source and a plurality of power switches arranged in pairs, each switch in each pair periodically coupled to said DC voltage source, each pair constituting a leg, and each leg generating a different phase AC signal. The AC signal represented by a sequence of vector components that form a space vector rotating through a set of axes represented by each said phase. A controller is provided to generate a plurality of PWM signals controlling the conduction states of said switches to periodically couple one or the other of said pair of switches to said DC voltage source. The controller is adapted to periodically switch the rotational sense of the space vector components from a clockwise direction to a counter-clockwise direction.
In another aspect, the present invention provides a space vector pulse width modulation system comprising a controller that generates a plurality of PWM signals controlling the conduction states of a plurality of switches to generate a polyphase AC signal. The switches generating an AC signal represented by a sequence of vector components which form a space vector rotating through a set of axes represented by each phase of the AC signal. The controller has a first operating mode that controls the switches to generate a space vector that rotates in one direction if the frequency of the space vector is above a predetermined value, and a second operating mode that that controls the switches to generate a space vector that changes rotation from clockwise to counter-clockwise if the frequency of the space vector is below a predetermined value.
In another aspect, the present invention provides space vector pulse width modulation system, comprising a controller generating a plurality of PWM signals controlling the conduction states of a plurality of switches to generate a polyphase AC signal. The switches generate an AC signal represented by a sequence of vector components which form a space vector rotating through a set of axes represented by each phase of the AC signal. The controller has a first operating mode that controls the switches to cause the components of the space vector to rotate in one direction if the frequency of the space vector is above a predetermined value, and a second operating mode that controls the switches to cause the components of the space vector to rotate from clockwise to counter-clockwise (and/or vice versa) if the frequency of the space vector is below a predetermined value.
In specific exemplary embodiments, the controller is adapted to periodically switch the rotational sense of said space vector from a clockwise direction to a counter-clockwise direction as a function of the thermal time constant of at least one of said switches controlled by the controller.
It will be appreciated by those skilled in the art that although the following Detailed Description will proceed with reference being made to preferred embodiments, the present invention is not intended to be limited to these preferred embodiments. Other features and advantages of the present invention will become apparent as the following Detailed Description proceeds, and upon reference to the Drawings, wherein like numerals depict like parts, and wherein: